Update notes for submitted changes

* BugFix: FakeDirver put RC FPGA error
This commit is contained in:
Gerrit Code Review 2019-11-26 00:21:47 +00:00
parent fff3a10fff
commit 79d8be6c5f

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Code-Review+2: Xinran WANG <xin-ran.wang@intel.com>
Code-Review+1: zhurong <aaronzhu1121@gmail.com>
Code-Review+2: Sundar Nadathur <sundar.nadathur@intel.com>
Workflow+1: Sundar Nadathur <sundar.nadathur@intel.com>
Verified+2: Zuul
Submitted-by: Zuul
Submitted-at: Tue, 26 Nov 2019 00:21:47 +0000
Reviewed-on: https://review.opendev.org/695644
Project: openstack/cyborg
Branch: refs/heads/master