Update notes for submitted changes
* BugFix: FakeDirver put RC FPGA error
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Code-Review+2: Xinran WANG <xin-ran.wang@intel.com>
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Code-Review+1: zhurong <aaronzhu1121@gmail.com>
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Code-Review+2: Sundar Nadathur <sundar.nadathur@intel.com>
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Workflow+1: Sundar Nadathur <sundar.nadathur@intel.com>
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Verified+2: Zuul
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Submitted-by: Zuul
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Submitted-at: Tue, 26 Nov 2019 00:21:47 +0000
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Reviewed-on: https://review.opendev.org/695644
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Project: openstack/cyborg
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Branch: refs/heads/master
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