openstack/deb-libisal
Code Issues Proposed changes

raid: Add base function aliases and group src by arch

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Change-Id: If7d987bcebb0ed1293d6836cd038746e7b0bbd85
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
This commit is contained in:
Greg Tucker 2017-03-21 17:53:49 -07:00
parent 5d9cf8cadf
commit 1268a57a32
3 changed files with 129 additions and 4 deletions
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25
raid/Makefile.am
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@ -27,10 +27,27 @@
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
######################################################################## ########################################################################
lsrc += raid/xor_gen_sse.asm raid/pq_gen_sse.asm raid/xor_check_sse.asm \ lsrc += raid/raid_base.c
raid/pq_check_sse.asm raid/pq_gen_avx.asm \
raid/xor_gen_avx.asm raid/pq_gen_avx2.asm \ lsrc_base_aliases += raid/raid_base_aliases.c
raid/raid_base.c raid/raid_multibinary.asm
lsrc_x86_64 += \
raid/xor_gen_sse.asm \
raid/pq_gen_sse.asm \
raid/xor_check_sse.asm \
raid/pq_check_sse.asm \
raid/pq_gen_avx.asm \
raid/xor_gen_avx.asm \
raid/pq_gen_avx2.asm \
raid/raid_multibinary.asm
lsrc_x86_32 += \
raid/xor_gen_sse.asm \
raid/pq_gen_sse_i32.asm \
raid/xor_check_sse.asm \
raid/pq_check_sse_i32.asm \
raid/raid_multibinary_i32.asm
extern_hdrs += include/raid.h extern_hdrs += include/raid.h

50
raid/raid_base_aliases.c Normal file
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@ -0,0 +1,50 @@
/**********************************************************************
Copyright(c) 2011-2017 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include "raid.h"
int pq_gen(int vects, int len, void **array)
{
return pq_gen_base(vects, len, array);
}
int pq_check(int vects, int len, void **array)
{
return pq_check_base(vects, len, array);
}
int xor_gen(int vects, int len, void **array)
{
return xor_gen_base(vects, len, array);
}
int xor_check(int vects, int len, void **array)
{
return xor_check_base(vects, len, array);
}

58
raid/raid_multibinary_i32.asm Normal file
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@ -0,0 +1,58 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2017 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%ifidn __OUTPUT_FORMAT__, elf64
%define WRT_OPT wrt ..plt
%else
%define WRT_OPT
%endif
%include "reg_sizes.asm"
%include "multibinary.asm"
[bits 32]
extern xor_gen_base
extern xor_gen_sse
extern pq_gen_base
extern pq_gen_sse
extern xor_check_base
extern xor_check_sse
extern pq_check_base
extern pq_check_sse
mbin_interface xor_gen
mbin_interface pq_gen
mbin_interface xor_check
mbin_interface pq_check
mbin_dispatch_init5 xor_gen, xor_gen_base, xor_gen_sse, xor_gen_sse, xor_gen_sse
mbin_dispatch_init5 pq_gen, pq_gen_base, pq_gen_sse, pq_gen_sse, pq_gen_sse
mbin_dispatch_init5 xor_check, xor_check_base, xor_check_sse, xor_check_sse, xor_check_sse
mbin_dispatch_init5 pq_check, pq_check_base, pq_check_sse, pq_check_sse, pq_check_sse