openstack/deb-libisal
Code Issues Proposed changes

crc64: add crc64 ecma polynomial

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crc64_ecma_norm is used for the normal format.
crc64_ecma_refl is used for the refleced format.

Change-Id: I8fa8aad48ed995ea7edcdb8e123e1a5f1a1f01ad
Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
This commit is contained in:
Xiaodong Liu 2016-08-26 09:57:55 -04:00 committed by Greg Tucker
parent d822c79d85
commit 90f0ea90de
10 changed files with 1994 additions and 3 deletions
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12
crc/Makefile.am
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@ -34,16 +34,22 @@ lsrc += \
crc/crc32_ieee_by4.asm \
crc/crc32_iscsi_01.asm \
crc/crc32_iscsi_00.asm \
crc/crc64_multibinary.asm \
crc/crc64_ecma_refl_by8.asm \
crc/crc64_ecma_norm_by8.asm \
crc/crc64_base.c \
crc/crc_multibinary.asm \
crc/crc_base.c
src_include += -I $(srcdir)/crc
extern_hdrs += include/crc.h
extern_hdrs += include/crc.h include/crc64.h
other_src += include/reg_sizes.asm include/types.h include/test.h
check_tests += crc/crc16_t10dif_test crc/crc32_ieee_test crc/crc32_iscsi_test
check_tests += crc/crc16_t10dif_test crc/crc32_ieee_test crc/crc32_iscsi_test \
crc/crc64_ecma_refl_test crc/crc64_ecma_norm_test
perf_tests += crc/crc16_t10dif_perf crc/crc32_ieee_perf crc/crc32_iscsi_perf
perf_tests += crc/crc16_t10dif_perf crc/crc32_ieee_perf crc/crc32_iscsi_perf \
crc/crc64_ecma_refl_perf crc/crc64_ecma_norm_perf
examples += crc/crc_simple_test

79
crc/crc64_base.c Normal file
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@ -0,0 +1,79 @@
/**********************************************************************
Copyright(c) 2011-2016 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include <stdlib.h>
#include "crc64.h"
#define MAX_ITER 8
// crc64_ecma baseline function
// Slow crc64 from the definition. Can be sped up with a lookup table.
uint64_t crc64_ecma_refl_base(uint64_t seed, uint8_t * buf, uint64_t len)
{
uint64_t rem = ~seed;
unsigned int i, j;
uint64_t poly = 0xC96C5795D7870F42ULL; // ECMA-182 standard reflected
for (i = 0; i < len; i++) {
rem = rem ^ (uint64_t) buf[i];
for (j = 0; j < MAX_ITER; j++) {
rem = (rem & 0x1ULL ? poly : 0) ^ (rem >> 1);
}
}
return ~rem;
}
uint64_t crc64_ecma_norm_base(uint64_t seed, uint8_t * buf, uint64_t len)
{
uint64_t rem = ~seed;
unsigned int i, j;
uint64_t poly = 0x42F0E1EBA9EA3693ULL; // ECMA-182 standard
for (i = 0; i < len; i++) {
rem = rem ^ ((uint64_t) buf[i] << 56);
for (j = 0; j < MAX_ITER; j++) {
rem = (rem & 0x8000000000000000ULL ? poly : 0) ^ (rem << 1);
}
}
return ~rem;
}
struct slver {
unsigned short snum;
unsigned char ver;
unsigned char core;
};
struct slver crc64_ecma_refl_base_slver_0000001c;
struct slver crc64_ecma_refl_base_slver = { 0x001c, 0x00, 0x00 };
struct slver crc64_ecma_norm_base_slver_00000019;
struct slver crc64_ecma_norm_base_slver = { 0x0019, 0x00, 0x00 };

577
crc/crc64_ecma_norm_by8.asm Normal file
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@ -0,0 +1,577 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Function API:
; uint64_t crc64_ecma_norm_by8(
; uint64_t init_crc, //initial CRC value, 64 bits
; const unsigned char *buf, //buffer pointer to calculate CRC on
; uint64_t len //buffer length in bytes (64-bit data)
; );
;
; yasm -f x64 -f elf64 -X gnu -g dwarf2 crc64_ecma_norm_by8
%include "reg_sizes.asm"
[bits 64]
default rel
section .text
%ifidn __OUTPUT_FORMAT__, win64
%xdefine arg1 rcx
%xdefine arg2 rdx
%xdefine arg3 r8
%else
%xdefine arg1 rdi
%xdefine arg2 rsi
%xdefine arg3 rdx
%endif
%define TMP 16*0
%ifidn __OUTPUT_FORMAT__, win64
%define XMM_SAVE 16*2
%define VARIABLE_OFFSET 16*10+8
%else
%define VARIABLE_OFFSET 16*2+8
%endif
align 16
global crc64_ecma_norm_by8:function
crc64_ecma_norm_by8:
not arg1 ;~init_crc
sub rsp,VARIABLE_OFFSET
%ifidn __OUTPUT_FORMAT__, win64
; push the xmm registers into the stack to maintain
movdqa [rsp + XMM_SAVE + 16*0], xmm6
movdqa [rsp + XMM_SAVE + 16*1], xmm7
movdqa [rsp + XMM_SAVE + 16*2], xmm8
movdqa [rsp + XMM_SAVE + 16*3], xmm9
movdqa [rsp + XMM_SAVE + 16*4], xmm10
movdqa [rsp + XMM_SAVE + 16*5], xmm11
movdqa [rsp + XMM_SAVE + 16*6], xmm12
movdqa [rsp + XMM_SAVE + 16*7], xmm13
%endif
; check if smaller than 256
cmp arg3, 256
; for sizes less than 256, we can't fold 128B at a time...
jl _less_than_256
; load the initial crc value
movq xmm10, arg1 ; initial crc
; crc value does not need to be byte-reflected, but it needs to be moved to the high part of the register.
; because data will be byte-reflected and will align with initial crc at correct place.
pslldq xmm10, 8
movdqa xmm11, [SHUF_MASK]
; receive the initial 128B data, xor the initial crc value
movdqu xmm0, [arg2+16*0]
movdqu xmm1, [arg2+16*1]
movdqu xmm2, [arg2+16*2]
movdqu xmm3, [arg2+16*3]
movdqu xmm4, [arg2+16*4]
movdqu xmm5, [arg2+16*5]
movdqu xmm6, [arg2+16*6]
movdqu xmm7, [arg2+16*7]
pshufb xmm0, xmm11
; XOR the initial_crc value
pxor xmm0, xmm10
pshufb xmm1, xmm11
pshufb xmm2, xmm11
pshufb xmm3, xmm11
pshufb xmm4, xmm11
pshufb xmm5, xmm11
pshufb xmm6, xmm11
pshufb xmm7, xmm11
movdqa xmm10, [rk3] ;xmm10 has rk3 and rk4
;imm value of pclmulqdq instruction will determine which constant to use
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; we subtract 256 instead of 128 to save one instruction from the loop
sub arg3, 256
; at this section of the code, there is 128*x+y (0<=y<128) bytes of buffer. The _fold_128_B_loop
; loop will fold 128B at a time until we have 128+y Bytes of buffer
; fold 128B at a time. This section of the code folds 8 xmm registers in parallel
_fold_128_B_loop:
; update the buffer pointer
add arg2, 128 ; buf += 128;
movdqu xmm9, [arg2+16*0]
movdqu xmm12, [arg2+16*1]
pshufb xmm9, xmm11
pshufb xmm12, xmm11
movdqa xmm8, xmm0
movdqa xmm13, xmm1
pclmulqdq xmm0, xmm10, 0x0
pclmulqdq xmm8, xmm10 , 0x11
pclmulqdq xmm1, xmm10, 0x0
pclmulqdq xmm13, xmm10 , 0x11
pxor xmm0, xmm9
xorps xmm0, xmm8
pxor xmm1, xmm12
xorps xmm1, xmm13
movdqu xmm9, [arg2+16*2]
movdqu xmm12, [arg2+16*3]
pshufb xmm9, xmm11
pshufb xmm12, xmm11
movdqa xmm8, xmm2
movdqa xmm13, xmm3
pclmulqdq xmm2, xmm10, 0x0
pclmulqdq xmm8, xmm10 , 0x11
pclmulqdq xmm3, xmm10, 0x0
pclmulqdq xmm13, xmm10 , 0x11
pxor xmm2, xmm9
xorps xmm2, xmm8
pxor xmm3, xmm12
xorps xmm3, xmm13
movdqu xmm9, [arg2+16*4]
movdqu xmm12, [arg2+16*5]
pshufb xmm9, xmm11
pshufb xmm12, xmm11
movdqa xmm8, xmm4
movdqa xmm13, xmm5
pclmulqdq xmm4, xmm10, 0x0
pclmulqdq xmm8, xmm10 , 0x11
pclmulqdq xmm5, xmm10, 0x0
pclmulqdq xmm13, xmm10 , 0x11
pxor xmm4, xmm9
xorps xmm4, xmm8
pxor xmm5, xmm12
xorps xmm5, xmm13
movdqu xmm9, [arg2+16*6]
movdqu xmm12, [arg2+16*7]
pshufb xmm9, xmm11
pshufb xmm12, xmm11
movdqa xmm8, xmm6
movdqa xmm13, xmm7
pclmulqdq xmm6, xmm10, 0x0
pclmulqdq xmm8, xmm10 , 0x11
pclmulqdq xmm7, xmm10, 0x0
pclmulqdq xmm13, xmm10 , 0x11
pxor xmm6, xmm9
xorps xmm6, xmm8
pxor xmm7, xmm12
xorps xmm7, xmm13
sub arg3, 128
; check if there is another 128B in the buffer to be able to fold
jge _fold_128_B_loop
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
add arg2, 128
; at this point, the buffer pointer is pointing at the last y Bytes of the buffer, where 0 <= y < 128
; the 128B of folded data is in 8 of the xmm registers: xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
; fold the 8 xmm registers to 1 xmm register with different constants
movdqa xmm10, [rk9]
movdqa xmm8, xmm0
pclmulqdq xmm0, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
xorps xmm7, xmm0
movdqa xmm10, [rk11]
movdqa xmm8, xmm1
pclmulqdq xmm1, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
xorps xmm7, xmm1
movdqa xmm10, [rk13]
movdqa xmm8, xmm2
pclmulqdq xmm2, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
pxor xmm7, xmm2
movdqa xmm10, [rk15]
movdqa xmm8, xmm3
pclmulqdq xmm3, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
xorps xmm7, xmm3
movdqa xmm10, [rk17]
movdqa xmm8, xmm4
pclmulqdq xmm4, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
pxor xmm7, xmm4
movdqa xmm10, [rk19]
movdqa xmm8, xmm5
pclmulqdq xmm5, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
xorps xmm7, xmm5
movdqa xmm10, [rk1] ;xmm10 has rk1 and rk2
movdqa xmm8, xmm6
pclmulqdq xmm6, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
pxor xmm7, xmm6
; instead of 128, we add 112 to the loop counter to save 1 instruction from the loop
; instead of a cmp instruction, we use the negative flag with the jl instruction
add arg3, 128-16
jl _final_reduction_for_128
; now we have 16+y bytes left to reduce. 16 Bytes is in register xmm7 and the rest is in memory
; we can fold 16 bytes at a time if y>=16
; continue folding 16B at a time
_16B_reduction_loop:
movdqa xmm8, xmm7
pclmulqdq xmm7, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
movdqu xmm0, [arg2]
pshufb xmm0, xmm11
pxor xmm7, xmm0
add arg2, 16
sub arg3, 16
; instead of a cmp instruction, we utilize the flags with the jge instruction
; equivalent of: cmp arg3, 16-16
; check if there is any more 16B in the buffer to be able to fold
jge _16B_reduction_loop
;now we have 16+z bytes left to reduce, where 0<= z < 16.
;first, we reduce the data in the xmm7 register
_final_reduction_for_128:
; check if any more data to fold. If not, compute the CRC of the final 128 bits
add arg3, 16
je _128_done
; here we are getting data that is less than 16 bytes.
; since we know that there was data before the pointer, we can offset the input pointer before the actual point, to receive exactly 16 bytes.
; after that the registers need to be adjusted.
_get_last_two_xmms:
movdqa xmm2, xmm7
movdqu xmm1, [arg2 - 16 + arg3]
pshufb xmm1, xmm11
; get rid of the extra data that was loaded before
; load the shift constant
lea rax, [pshufb_shf_table + 16]
sub rax, arg3
movdqu xmm0, [rax]
; shift xmm2 to the left by arg3 bytes
pshufb xmm2, xmm0
; shift xmm7 to the right by 16-arg3 bytes
pxor xmm0, [mask1]
pshufb xmm7, xmm0
pblendvb xmm1, xmm2 ;xmm0 is implicit
; fold 16 Bytes
movdqa xmm2, xmm1
movdqa xmm8, xmm7
pclmulqdq xmm7, xmm10, 0x11
pclmulqdq xmm8, xmm10, 0x0
pxor xmm7, xmm8
pxor xmm7, xmm2
_128_done:
; compute crc of a 128-bit value
movdqa xmm10, [rk5] ; rk5 and rk6 in xmm10
movdqa xmm0, xmm7
;64b fold
pclmulqdq xmm7, xmm10, 0x01 ; H*L
pslldq xmm0, 8
pxor xmm7, xmm0
;barrett reduction
_barrett:
movdqa xmm10, [rk7] ; rk7 and rk8 in xmm10
movdqa xmm0, xmm7
movdqa xmm1, xmm7
pand xmm1, [mask3]
pclmulqdq xmm7, xmm10, 0x01
pxor xmm7, xmm1
pclmulqdq xmm7, xmm10, 0x11
pxor xmm7, xmm0
pextrq rax, xmm7, 0
_cleanup:
not rax
%ifidn __OUTPUT_FORMAT__, win64
movdqa xmm6, [rsp + XMM_SAVE + 16*0]
movdqa xmm7, [rsp + XMM_SAVE + 16*1]
movdqa xmm8, [rsp + XMM_SAVE + 16*2]
movdqa xmm9, [rsp + XMM_SAVE + 16*3]
movdqa xmm10, [rsp + XMM_SAVE + 16*4]
movdqa xmm11, [rsp + XMM_SAVE + 16*5]
movdqa xmm12, [rsp + XMM_SAVE + 16*6]
movdqa xmm13, [rsp + XMM_SAVE + 16*7]
%endif
add rsp, VARIABLE_OFFSET
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 16
_less_than_256:
; check if there is enough buffer to be able to fold 16B at a time
cmp arg3, 32
jl _less_than_32
movdqa xmm11, [SHUF_MASK]
; if there is, load the constants
movdqa xmm10, [rk1] ; rk1 and rk2 in xmm10
movq xmm0, arg1 ; get the initial crc value
pslldq xmm0, 8 ; align it to its correct place
movdqu xmm7, [arg2] ; load the plaintext
pshufb xmm7, xmm11 ; byte-reflect the plaintext
pxor xmm7, xmm0
; update the buffer pointer
add arg2, 16
; update the counter. subtract 32 instead of 16 to save one instruction from the loop
sub arg3, 32
jmp _16B_reduction_loop
align 16
_less_than_32:
; mov initial crc to the return value. this is necessary for zero-length buffers.
mov rax, arg1
test arg3, arg3
je _cleanup
movdqa xmm11, [SHUF_MASK]
movq xmm0, arg1 ; get the initial crc value
pslldq xmm0, 8 ; align it to its correct place
cmp arg3, 16
je _exact_16_left
jl _less_than_16_left
movdqu xmm7, [arg2] ; load the plaintext
pshufb xmm7, xmm11 ; byte-reflect the plaintext
pxor xmm7, xmm0 ; xor the initial crc value
add arg2, 16
sub arg3, 16
movdqa xmm10, [rk1] ; rk1 and rk2 in xmm10
jmp _get_last_two_xmms
align 16
_less_than_16_left:
; use stack space to load data less than 16 bytes, zero-out the 16B in memory first.
pxor xmm1, xmm1
mov r11, rsp
movdqa [r11], xmm1
; backup the counter value
mov r9, arg3
cmp arg3, 8
jl _less_than_8_left
; load 8 Bytes
mov rax, [arg2]
mov [r11], rax
add r11, 8
sub arg3, 8
add arg2, 8
_less_than_8_left:
cmp arg3, 4
jl _less_than_4_left
; load 4 Bytes
mov eax, [arg2]
mov [r11], eax
add r11, 4
sub arg3, 4
add arg2, 4
_less_than_4_left:
cmp arg3, 2
jl _less_than_2_left
; load 2 Bytes
mov ax, [arg2]
mov [r11], ax
add r11, 2
sub arg3, 2
add arg2, 2
_less_than_2_left:
cmp arg3, 1
jl _zero_left
; load 1 Byte
mov al, [arg2]
mov [r11], al
_zero_left:
movdqa xmm7, [rsp]
pshufb xmm7, xmm11
pxor xmm7, xmm0 ; xor the initial crc value
; shl r9, 4
lea rax, [pshufb_shf_table + 16]
sub rax, r9
cmp r9, 8
jl _end_1to7
_end_8to15:
movdqu xmm0, [rax]
pxor xmm0, [mask1]
pshufb xmm7, xmm0
jmp _128_done
_end_1to7:
; Right shift (8-length) bytes in XMM
add rax, 8
movdqu xmm0, [rax]
pshufb xmm7,xmm0
jmp _barrett
align 16
_exact_16_left:
movdqu xmm7, [arg2]
pshufb xmm7, xmm11
pxor xmm7, xmm0 ; xor the initial crc value
jmp _128_done
section .data
; precomputed constants
align 16
rk1 :
DQ 0x5f5c3c7eb52fab6
rk2 :
DQ 0x4eb938a7d257740e
rk3 :
DQ 0x5cf79dea9ac37d6
rk4 :
DQ 0x001067e571d7d5c2
rk5 :
DQ 0x5f5c3c7eb52fab6
rk6 :
DQ 0x0000000000000000
rk7 :
DQ 0x578d29d06cc4f872
rk8 :
DQ 0x42f0e1eba9ea3693
rk9 :
DQ 0xe464f4df5fb60ac1
rk10 :
DQ 0xb649c5b35a759cf2
rk11 :
DQ 0x9af04e1eff82d0dd
rk12 :
DQ 0x6e82e609297f8fe8
rk13 :
DQ 0x97c516e98bd2e73
rk14 :
DQ 0xb76477b31e22e7b
rk15 :
DQ 0x5f6843ca540df020
rk16 :
DQ 0xddf4b6981205b83f
rk17 :
DQ 0x54819d8713758b2c
rk18 :
DQ 0x4a6b90073eb0af5a
rk19 :
DQ 0x571bee0a227ef92b
rk20 :
DQ 0x44bef2a201b5200c
mask1:
dq 0x8080808080808080, 0x8080808080808080
mask2:
dq 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF
mask3:
dq 0x0000000000000000, 0xFFFFFFFFFFFFFFFF
SHUF_MASK:
dq 0x08090A0B0C0D0E0F, 0x0001020304050607
pshufb_shf_table:
; use these values for shift constants for the pshufb instruction
; different alignments result in values as shown:
; dq 0x8887868584838281, 0x008f8e8d8c8b8a89 ; shl 15 (16-1) / shr1
; dq 0x8988878685848382, 0x01008f8e8d8c8b8a ; shl 14 (16-3) / shr2
; dq 0x8a89888786858483, 0x0201008f8e8d8c8b ; shl 13 (16-4) / shr3
; dq 0x8b8a898887868584, 0x030201008f8e8d8c ; shl 12 (16-4) / shr4
; dq 0x8c8b8a8988878685, 0x04030201008f8e8d ; shl 11 (16-5) / shr5
; dq 0x8d8c8b8a89888786, 0x0504030201008f8e ; shl 10 (16-6) / shr6
; dq 0x8e8d8c8b8a898887, 0x060504030201008f ; shl 9 (16-7) / shr7
; dq 0x8f8e8d8c8b8a8988, 0x0706050403020100 ; shl 8 (16-8) / shr8
; dq 0x008f8e8d8c8b8a89, 0x0807060504030201 ; shl 7 (16-9) / shr9
; dq 0x01008f8e8d8c8b8a, 0x0908070605040302 ; shl 6 (16-10) / shr10
; dq 0x0201008f8e8d8c8b, 0x0a09080706050403 ; shl 5 (16-11) / shr11
; dq 0x030201008f8e8d8c, 0x0b0a090807060504 ; shl 4 (16-12) / shr12
; dq 0x04030201008f8e8d, 0x0c0b0a0908070605 ; shl 3 (16-13) / shr13
; dq 0x0504030201008f8e, 0x0d0c0b0a09080706 ; shl 2 (16-14) / shr14
; dq 0x060504030201008f, 0x0e0d0c0b0a090807 ; shl 1 (16-15) / shr15
dq 0x8786858483828100, 0x8f8e8d8c8b8a8988
dq 0x0706050403020100, 0x0f0e0d0c0b0a0908
dq 0x8080808080808080, 0x0f0e0d0c0b0a0908
dq 0x8080808080808080, 0x8080808080808080
;;; func core, ver, snum
slversion crc64_ecma_norm_by8, 01, 00, 001a

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/**********************************************************************
Copyright(c) 2011-2016 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <sys/time.h>
#include "crc64.h"
#include "test.h"
//#define CACHED_TEST
#ifdef CACHED_TEST
// Cached test, loop many times over small dataset
# define TEST_LEN 8*1024
# define TEST_LOOPS 400000
# define TEST_TYPE_STR "_warm"
#else
// Uncached test. Pull from large mem base.
# define GT_L3_CACHE 32*1024*1024 /* some number > last level cache */
# define TEST_LEN (2 * GT_L3_CACHE)
# define TEST_LOOPS 100
# define TEST_TYPE_STR "_cold"
#endif
#ifndef TEST_SEED
# define TEST_SEED 0x1234
#endif
#define TEST_MEM TEST_LEN
int main(int argc, char *argv[])
{
int i;
void *buf;
uint64_t crc;
struct perf start, stop;
printf("crc64_ecma_norm_perf:\n");
if (posix_memalign(&buf, 1024, TEST_LEN)) {
printf("alloc error: Fail");
return -1;
}
memset(buf, (char)TEST_SEED, TEST_LEN);
printf("Start timed tests\n");
fflush(0);
crc = crc64_ecma_norm(TEST_SEED, buf, TEST_LEN);
perf_start(&start);
for (i = 0; i < TEST_LOOPS; i++) {
crc = crc64_ecma_norm(TEST_SEED, buf, TEST_LEN);
}
perf_stop(&stop);
printf("crc64_ecma_norm" TEST_TYPE_STR ": ");
perf_print(stop, start, (long long)TEST_LEN * i);
printf("finish 0x%lx\n", crc);
return 0;
}

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/**********************************************************************
Copyright(c) 2011-2016 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "crc64.h"
#include "types.h"
#ifndef TEST_SEED
# define TEST_SEED 0x1234
#endif
#define MAX_BUF 512
#define TEST_SIZE 20
typedef uint64_t u64;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
// Generates pseudo-random data
void rand_buffer(unsigned char *buf, long buffer_size)
{
long i;
for (i = 0; i < buffer_size; i++)
buf[i] = rand();
}
int main(int argc, char *argv[])
{
int fail = 0;
u64 r;
int verbose = argc - 1;
int i, s, ret;
void *buf_alloc;
unsigned char *buf;
printf("Test crc64_ecma_norm ");
// Align to MAX_BUF boundary
ret = posix_memalign(&buf_alloc, MAX_BUF, MAX_BUF * TEST_SIZE);
if (ret) {
printf("alloc error: Fail");
return -1;
}
buf = (unsigned char *)buf_alloc;
srand(TEST_SEED);
// Test of all zeros
memset(buf, 0, MAX_BUF * 10);
u64 crc = crc64_ecma_norm(TEST_SEED, buf, MAX_BUF);
u64 crc_ref = crc64_ecma_norm_base(TEST_SEED, buf, MAX_BUF);
if (crc != crc_ref) {
fail++;
printf("\n opt ref\n");
printf(" ------ ------\n");
printf("crc zero = 0x%16lx 0x%16lx \n", crc, crc_ref);
} else
printf(".");
// Another simple test pattern
memset(buf, 0x8a, MAX_BUF);
crc = crc64_ecma_norm(TEST_SEED, buf, MAX_BUF);
crc_ref = crc64_ecma_norm_base(TEST_SEED, buf, MAX_BUF);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc all 8a = 0x%16lx 0x%16lx\n", crc, crc_ref);
else
printf(".");
// Do a few random tests
r = rand();
rand_buffer(buf, MAX_BUF * TEST_SIZE);
for (i = 0; i < TEST_SIZE; i++) {
crc = crc64_ecma_norm(r, buf, MAX_BUF);
crc_ref = crc64_ecma_norm_base(r, buf, MAX_BUF);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc rand%3d = 0x%16lx 0x%16lx\n", i, crc, crc_ref);
else
printf(".");
buf += MAX_BUF;
}
// Do a few random sizes
buf = (unsigned char *)buf_alloc; //reset buf
r = rand();
for (i = MAX_BUF; i >= 0; i--) {
crc = crc64_ecma_norm(r, buf, i);
crc_ref = crc64_ecma_norm_base(r, buf, i);
if (crc != crc_ref) {
fail++;
printf("fail random size%i 0x%16lx 0x%16lx\n", i, crc, crc_ref);
} else
printf(".");
}
// Try different seeds
for (s = 0; s < 20; s++) {
buf = (unsigned char *)buf_alloc; //reset buf
r = rand(); // just to get a new seed
rand_buffer(buf, MAX_BUF * TEST_SIZE); // new pseudo-rand data
if (verbose)
printf("seed = 0x%lx\n", r);
for (i = 0; i < TEST_SIZE; i++) {
crc = crc64_ecma_norm(r, buf, MAX_BUF);
crc_ref = crc64_ecma_norm_base(r, buf, MAX_BUF);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc rand%3d = 0x%16lx 0x%16lx\n", i, crc, crc_ref);
else
printf(".");
buf += MAX_BUF;
}
}
// Run tests at end of buffer
buf = (unsigned char *)buf_alloc; //reset buf
buf = buf + ((MAX_BUF - 1) * TEST_SIZE); //Line up TEST_SIZE from end
for (i = 0; i < TEST_SIZE; i++) {
crc = crc64_ecma_norm(TEST_SEED, buf + i, TEST_SIZE - i);
crc_ref = crc64_ecma_norm_base(TEST_SEED, buf + i, TEST_SIZE - i);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc eob rand%3d = 0x%16lx 0x%16lx\n", i, crc, crc_ref);
else
printf(".");
}
printf("Test done: %s\n", fail ? "Fail" : "Pass");
if (fail)
printf("\nFailed %d tests\n", fail);
return fail;
}

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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Function API:
; uint64_t crc64_ecma_refl_by8(
; uint64_t init_crc, //initial CRC value, 64 bits
; const unsigned char *buf, //buffer pointer to calculate CRC on
; uint64_t len //buffer length in bytes (64-bit data)
; );
;
; Reference paper titled "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
; sample yasm command line:
; yasm -f x64 -f elf64 -X gnu -g dwarf2 crc64_ecma_refl_by8
%include "reg_sizes.asm"
[bits 64]
default rel
section .text
%ifidn __OUTPUT_FORMAT__, win64
%xdefine arg1 rcx
%xdefine arg2 rdx
%xdefine arg3 r8
%else
%xdefine arg1 rdi
%xdefine arg2 rsi
%xdefine arg3 rdx
%endif
%define TMP 16*0
%ifidn __OUTPUT_FORMAT__, win64
%define XMM_SAVE 16*2
%define VARIABLE_OFFSET 16*10+8
%else
%define VARIABLE_OFFSET 16*2+8
%endif
align 16
global crc64_ecma_refl_by8:function
crc64_ecma_refl_by8:
; uint64_t c = crc ^ 0xffffffff,ffffffffL;
not arg1
sub rsp, VARIABLE_OFFSET
%ifidn __OUTPUT_FORMAT__, win64
; push the xmm registers into the stack to maintain
movdqa [rsp + XMM_SAVE + 16*0], xmm6
movdqa [rsp + XMM_SAVE + 16*1], xmm7
movdqa [rsp + XMM_SAVE + 16*2], xmm8
movdqa [rsp + XMM_SAVE + 16*3], xmm9
movdqa [rsp + XMM_SAVE + 16*4], xmm10
movdqa [rsp + XMM_SAVE + 16*5], xmm11
movdqa [rsp + XMM_SAVE + 16*6], xmm12
movdqa [rsp + XMM_SAVE + 16*7], xmm13
%endif
; check if smaller than 256B
cmp arg3, 256
; for sizes less than 256, we can't fold 128B at a time...
jl _less_than_256
; load the initial crc value
movq xmm10, arg1 ; initial crc
; receive the initial 128B data, xor the initial crc value
movdqu xmm0, [arg2+16*0]
movdqu xmm1, [arg2+16*1]
movdqu xmm2, [arg2+16*2]
movdqu xmm3, [arg2+16*3]
movdqu xmm4, [arg2+16*4]
movdqu xmm5, [arg2+16*5]
movdqu xmm6, [arg2+16*6]
movdqu xmm7, [arg2+16*7]
; XOR the initial_crc value
pxor xmm0, xmm10
movdqa xmm10, [rk3] ;xmm10 has rk3 and rk4
;imm value of pclmulqdq instruction will determine which constant to use
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; we subtract 256 instead of 128 to save one instruction from the loop
sub arg3, 256
; at this section of the code, there is 128*x+y (0<=y<128) bytes of buffer. The _fold_128_B_loop
; loop will fold 128B at a time until we have 128+y Bytes of buffer
; fold 128B at a time. This section of the code folds 8 xmm registers in parallel
_fold_128_B_loop:
; update the buffer pointer
add arg2, 128
movdqu xmm9, [arg2+16*0]
movdqu xmm12, [arg2+16*1]
movdqa xmm8, xmm0
movdqa xmm13, xmm1
pclmulqdq xmm0, xmm10, 0x10
pclmulqdq xmm8, xmm10 , 0x1
pclmulqdq xmm1, xmm10, 0x10
pclmulqdq xmm13, xmm10 , 0x1
pxor xmm0, xmm9
xorps xmm0, xmm8
pxor xmm1, xmm12
xorps xmm1, xmm13
movdqu xmm9, [arg2+16*2]
movdqu xmm12, [arg2+16*3]
movdqa xmm8, xmm2
movdqa xmm13, xmm3
pclmulqdq xmm2, xmm10, 0x10
pclmulqdq xmm8, xmm10 , 0x1
pclmulqdq xmm3, xmm10, 0x10
pclmulqdq xmm13, xmm10 , 0x1
pxor xmm2, xmm9
xorps xmm2, xmm8
pxor xmm3, xmm12
xorps xmm3, xmm13
movdqu xmm9, [arg2+16*4]
movdqu xmm12, [arg2+16*5]
movdqa xmm8, xmm4
movdqa xmm13, xmm5
pclmulqdq xmm4, xmm10, 0x10
pclmulqdq xmm8, xmm10 , 0x1
pclmulqdq xmm5, xmm10, 0x10
pclmulqdq xmm13, xmm10 , 0x1
pxor xmm4, xmm9
xorps xmm4, xmm8
pxor xmm5, xmm12
xorps xmm5, xmm13
movdqu xmm9, [arg2+16*6]
movdqu xmm12, [arg2+16*7]
movdqa xmm8, xmm6
movdqa xmm13, xmm7
pclmulqdq xmm6, xmm10, 0x10
pclmulqdq xmm8, xmm10 , 0x1
pclmulqdq xmm7, xmm10, 0x10
pclmulqdq xmm13, xmm10 , 0x1
pxor xmm6, xmm9
xorps xmm6, xmm8
pxor xmm7, xmm12
xorps xmm7, xmm13
sub arg3, 128
; check if there is another 128B in the buffer to be able to fold
jge _fold_128_B_loop
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
add arg2, 128
; at this point, the buffer pointer is pointing at the last y Bytes of the buffer, where 0 <= y < 128
; the 128B of folded data is in 8 of the xmm registers: xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
; fold the 8 xmm registers to 1 xmm register with different constants
; xmm0 to xmm7
movdqa xmm10, [rk9]
movdqa xmm8, xmm0
pclmulqdq xmm0, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
xorps xmm7, xmm0
;xmm1 to xmm7
movdqa xmm10, [rk11]
movdqa xmm8, xmm1
pclmulqdq xmm1, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
xorps xmm7, xmm1
movdqa xmm10, [rk13]
movdqa xmm8, xmm2
pclmulqdq xmm2, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
pxor xmm7, xmm2
movdqa xmm10, [rk15]
movdqa xmm8, xmm3
pclmulqdq xmm3, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
xorps xmm7, xmm3
movdqa xmm10, [rk17]
movdqa xmm8, xmm4
pclmulqdq xmm4, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
pxor xmm7, xmm4
movdqa xmm10, [rk19]
movdqa xmm8, xmm5
pclmulqdq xmm5, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
xorps xmm7, xmm5
; xmm6 to xmm7
movdqa xmm10, [rk1]
movdqa xmm8, xmm6
pclmulqdq xmm6, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
pxor xmm7, xmm6
; instead of 128, we add 128-16 to the loop counter to save 1 instruction from the loop
; instead of a cmp instruction, we use the negative flag with the jl instruction
add arg3, 128-16
jl _final_reduction_for_128
; now we have 16+y bytes left to reduce. 16 Bytes is in register xmm7 and the rest is in memory
; we can fold 16 bytes at a time if y>=16
; continue folding 16B at a time
_16B_reduction_loop:
movdqa xmm8, xmm7
pclmulqdq xmm7, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
movdqu xmm0, [arg2]
pxor xmm7, xmm0
add arg2, 16
sub arg3, 16
; instead of a cmp instruction, we utilize the flags with the jge instruction
; equivalent of: cmp arg3, 16-16
; check if there is any more 16B in the buffer to be able to fold
jge _16B_reduction_loop
;now we have 16+z bytes left to reduce, where 0<= z < 16.
;first, we reduce the data in the xmm7 register
_final_reduction_for_128:
add arg3, 16
je _128_done
; here we are getting data that is less than 16 bytes.
; since we know that there was data before the pointer, we can offset the input pointer before the actual point, to receive exactly 16 bytes.
; after that the registers need to be adjusted.
_get_last_two_xmms:
movdqa xmm2, xmm7
movdqu xmm1, [arg2 - 16 + arg3]
; get rid of the extra data that was loaded before
; load the shift constant
lea rax, [pshufb_shf_table]
add rax, arg3
movdqu xmm0, [rax]
pshufb xmm7, xmm0
pxor xmm0, [mask3]
pshufb xmm2, xmm0
pblendvb xmm2, xmm1 ;xmm0 is implicit
;;;;;;;;;;
movdqa xmm8, xmm7
pclmulqdq xmm7, xmm10, 0x1
pclmulqdq xmm8, xmm10, 0x10
pxor xmm7, xmm8
pxor xmm7, xmm2
_128_done:
; compute crc of a 128-bit value
movdqa xmm10, [rk5]
movdqa xmm0, xmm7
;64b fold
pclmulqdq xmm7, xmm10, 0
psrldq xmm0, 8
pxor xmm7, xmm0
;barrett reduction
_barrett:
movdqa xmm1, xmm7
movdqa xmm10, [rk7]
pclmulqdq xmm7, xmm10, 0
movdqa xmm2, xmm7
pclmulqdq xmm7, xmm10, 0x10
pslldq xmm2, 8
pxor xmm7, xmm2
pxor xmm7, xmm1
pextrq rax, xmm7, 1
_cleanup:
; return c ^ 0xffffffff, ffffffffL;
not rax
%ifidn __OUTPUT_FORMAT__, win64
movdqa xmm6, [rsp + XMM_SAVE + 16*0]
movdqa xmm7, [rsp + XMM_SAVE + 16*1]
movdqa xmm8, [rsp + XMM_SAVE + 16*2]
movdqa xmm9, [rsp + XMM_SAVE + 16*3]
movdqa xmm10, [rsp + XMM_SAVE + 16*4]
movdqa xmm11, [rsp + XMM_SAVE + 16*5]
movdqa xmm12, [rsp + XMM_SAVE + 16*6]
movdqa xmm13, [rsp + XMM_SAVE + 16*7]
%endif
add rsp, VARIABLE_OFFSET
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
align 16
_less_than_256:
; check if there is enough buffer to be able to fold 16B at a time
cmp arg3, 32
jl _less_than_32
; if there is, load the constants
movdqa xmm10, [rk1] ; rk1 and rk2 in xmm10
movq xmm0, arg1 ; get the initial crc value
movdqu xmm7, [arg2] ; load the plaintext
pxor xmm7, xmm0
; update the buffer pointer
add arg2, 16
; update the counter. subtract 32 instead of 16 to save one instruction from the loop
sub arg3, 32
jmp _16B_reduction_loop
align 16
_less_than_32:
; mov initial crc to the return value. this is necessary for zero-length buffers.
mov rax, arg1
test arg3, arg3
je _cleanup
movq xmm0, arg1 ; get the initial crc value
cmp arg3, 16
je _exact_16_left
jl _less_than_16_left
movdqu xmm7, [arg2] ; load the plaintext
pxor xmm7, xmm0 ; xor the initial crc value
add arg2, 16
sub arg3, 16
movdqa xmm10, [rk1] ; rk1 and rk2 in xmm10
jmp _get_last_two_xmms
align 16
_less_than_16_left:
; use stack space to load data less than 16 bytes, zero-out the 16B in memory first.
pxor xmm1, xmm1
mov r11, rsp
movdqa [r11], xmm1
; backup the counter value
mov r9, arg3
cmp arg3, 8
jl _less_than_8_left
; load 8 Bytes
mov rax, [arg2]
mov [r11], rax
add r11, 8
sub arg3, 8
add arg2, 8
_less_than_8_left:
cmp arg3, 4
jl _less_than_4_left
; load 4 Bytes
mov eax, [arg2]
mov [r11], eax
add r11, 4
sub arg3, 4
add arg2, 4
_less_than_4_left:
cmp arg3, 2
jl _less_than_2_left
; load 2 Bytes
mov ax, [arg2]
mov [r11], ax
add r11, 2
sub arg3, 2
add arg2, 2
_less_than_2_left:
cmp arg3, 1
jl _zero_left
; load 1 Byte
mov al, [arg2]
mov [r11], al
_zero_left:
movdqa xmm7, [rsp]
pxor xmm7, xmm0 ; xor the initial crc value
lea rax,[pshufb_shf_table]
cmp r9, 8
jl _end_1to7
_end_8to15:
movdqu xmm0, [rax + r9]
pshufb xmm7,xmm0
jmp _128_done
_end_1to7:
; Left shift (8-length) bytes in XMM
movdqu xmm0, [rax + r9 + 8]
pshufb xmm7,xmm0
jmp _barrett
align 16
_exact_16_left:
movdqu xmm7, [arg2]
pxor xmm7, xmm0 ; xor the initial crc value
jmp _128_done
section .data
; precomputed constants
align 16
; rk7 = floor(2^128/Q)
; rk8 = Q
rk1 :
DQ 0xdabe95afc7875f40
rk2 :
DQ 0xe05dd497ca393ae4
rk3 :
DQ 0xd7d86b2af73de740
rk4 :
DQ 0x8757d71d4fcc1000
rk5 :
DQ 0xdabe95afc7875f40
rk6 :
DQ 0x0000000000000000
rk7 :
DQ 0x9c3e466c172963d5
rk8 :
DQ 0x92d8af2baf0e1e84
rk9 :
DQ 0x947874de595052cb
rk10 :
DQ 0x9e735cb59b4724da
rk11 :
DQ 0xe4ce2cd55fea0037
rk12 :
DQ 0x2fe3fd2920ce82ec
rk13 :
DQ 0xe31d519421a63a5
rk14 :
DQ 0x2e30203212cac325
rk15 :
DQ 0x81f6054a7842df4
rk16 :
DQ 0x6ae3efbb9dd441f3
rk17 :
DQ 0x69a35d91c3730254
rk18 :
DQ 0xb5ea1af9c013aca4
rk19 :
DQ 0x3be653a30fe1af51
rk20 :
DQ 0x60095b008a9efa44
pshufb_shf_table:
; use these values for shift constants for the pshufb instruction
; different alignments result in values as shown:
; dq 0x8887868584838281, 0x008f8e8d8c8b8a89 ; shl 15 (16-1) / shr1
; dq 0x8988878685848382, 0x01008f8e8d8c8b8a ; shl 14 (16-3) / shr2
; dq 0x8a89888786858483, 0x0201008f8e8d8c8b ; shl 13 (16-4) / shr3
; dq 0x8b8a898887868584, 0x030201008f8e8d8c ; shl 12 (16-4) / shr4
; dq 0x8c8b8a8988878685, 0x04030201008f8e8d ; shl 11 (16-5) / shr5
; dq 0x8d8c8b8a89888786, 0x0504030201008f8e ; shl 10 (16-6) / shr6
; dq 0x8e8d8c8b8a898887, 0x060504030201008f ; shl 9 (16-7) / shr7
; dq 0x8f8e8d8c8b8a8988, 0x0706050403020100 ; shl 8 (16-8) / shr8
; dq 0x008f8e8d8c8b8a89, 0x0807060504030201 ; shl 7 (16-9) / shr9
; dq 0x01008f8e8d8c8b8a, 0x0908070605040302 ; shl 6 (16-10) / shr10
; dq 0x0201008f8e8d8c8b, 0x0a09080706050403 ; shl 5 (16-11) / shr11
; dq 0x030201008f8e8d8c, 0x0b0a090807060504 ; shl 4 (16-12) / shr12
; dq 0x04030201008f8e8d, 0x0c0b0a0908070605 ; shl 3 (16-13) / shr13
; dq 0x0504030201008f8e, 0x0d0c0b0a09080706 ; shl 2 (16-14) / shr14
; dq 0x060504030201008f, 0x0e0d0c0b0a090807 ; shl 1 (16-15) / shr15
dq 0x8786858483828100, 0x8f8e8d8c8b8a8988
dq 0x0706050403020100, 0x000e0d0c0b0a0908
mask:
dq 0xFFFFFFFFFFFFFFFF, 0x0000000000000000
mask2:
dq 0xFFFFFFFF00000000, 0xFFFFFFFFFFFFFFFF
mask3:
dq 0x8080808080808080, 0x8080808080808080
;;; func core, ver, snum
slversion crc64_ecma_refl_by8, 01, 00, 001d

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/**********************************************************************
Copyright(c) 2011-2016 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include <sys/time.h>
#include "crc64.h"
#include "test.h"
//#define CACHED_TEST
#ifdef CACHED_TEST
// Cached test, loop many times over small dataset
# define TEST_LEN 8*1024
# define TEST_LOOPS 400000
# define TEST_TYPE_STR "_warm"
#else
// Uncached test. Pull from large mem base.
# define GT_L3_CACHE 32*1024*1024 /* some number > last level cache */
# define TEST_LEN (2 * GT_L3_CACHE)
# define TEST_LOOPS 100
# define TEST_TYPE_STR "_cold"
#endif
#ifndef TEST_SEED
# define TEST_SEED 0x1234
#endif
#define TEST_MEM TEST_LEN
int main(int argc, char *argv[])
{
int i;
void *buf;
uint64_t crc;
struct perf start, stop;
printf("crc64_ecma_refl_perf:\n");
if (posix_memalign(&buf, 1024, TEST_LEN)) {
printf("alloc error: Fail");
return -1;
}
memset(buf, (char)TEST_SEED, TEST_LEN);
printf("Start timed tests\n");
fflush(0);
crc = crc64_ecma_refl(TEST_SEED, buf, TEST_LEN);
perf_start(&start);
for (i = 0; i < TEST_LOOPS; i++) {
crc = crc64_ecma_refl(TEST_SEED, buf, TEST_LEN);
}
perf_stop(&stop);
printf("crc64_ecma_refl" TEST_TYPE_STR ": ");
perf_print(stop, start, (long long)TEST_LEN * i);
printf("finish 0x%lx\n", crc);
return 0;
}

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/**********************************************************************
Copyright(c) 2011-2016 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "crc64.h"
#include "types.h"
#ifndef TEST_SEED
# define TEST_SEED 0x1234
#endif
#define MAX_BUF 512
#define TEST_SIZE 20
typedef uint64_t u64;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;
// Generates pseudo-random data
void rand_buffer(unsigned char *buf, long buffer_size)
{
long i;
for (i = 0; i < buffer_size; i++)
buf[i] = rand();
}
int main(int argc, char *argv[])
{
int fail = 0;
u64 r;
int verbose = argc - 1;
int i, s, ret;
void *buf_alloc;
unsigned char *buf;
printf("Test crc64_ecma_refl ");
// Align to MAX_BUF boundary
ret = posix_memalign(&buf_alloc, MAX_BUF, MAX_BUF * TEST_SIZE);
if (ret) {
printf("alloc error: Fail");
return -1;
}
buf = (unsigned char *)buf_alloc;
srand(TEST_SEED);
// Test of all zeros
memset(buf, 0, MAX_BUF * 10);
u64 crc = crc64_ecma_refl(TEST_SEED, buf, MAX_BUF);
u64 crc_ref = crc64_ecma_refl_base(TEST_SEED, buf, MAX_BUF);
if (crc != crc_ref) {
fail++;
printf("\n opt ref\n");
printf(" ------ ------\n");
printf("crc zero = 0x%16lx 0x%16lx \n", crc, crc_ref);
} else
printf(".");
// Another simple test pattern
memset(buf, 0x8a, MAX_BUF);
crc = crc64_ecma_refl(TEST_SEED, buf, MAX_BUF);
crc_ref = crc64_ecma_refl_base(TEST_SEED, buf, MAX_BUF);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc all 8a = 0x%16lx 0x%16lx\n", crc, crc_ref);
else
printf(".");
// Do a few random tests
r = rand();
rand_buffer(buf, MAX_BUF * TEST_SIZE);
for (i = 0; i < TEST_SIZE; i++) {
crc = crc64_ecma_refl(r, buf, MAX_BUF);
crc_ref = crc64_ecma_refl_base(r, buf, MAX_BUF);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc rand%3d = 0x%16lx 0x%16lx\n", i, crc, crc_ref);
else
printf(".");
buf += MAX_BUF;
}
// Do a few random sizes
buf = (unsigned char *)buf_alloc; //reset buf
r = rand();
for (i = MAX_BUF; i >= 0; i--) {
crc = crc64_ecma_refl(r, buf, i);
crc_ref = crc64_ecma_refl_base(r, buf, i);
if (crc != crc_ref) {
fail++;
printf("fail random size%i 0x%16lx 0x%16lx\n", i, crc, crc_ref);
} else
printf(".");
}
// Try different seeds
for (s = 0; s < 20; s++) {
buf = (unsigned char *)buf_alloc; //reset buf
r = rand(); // just to get a new seed
rand_buffer(buf, MAX_BUF * TEST_SIZE); // new pseudo-rand data
if (verbose)
printf("seed = 0x%lx\n", r);
for (i = 0; i < TEST_SIZE; i++) {
crc = crc64_ecma_refl(r, buf, MAX_BUF);
crc_ref = crc64_ecma_refl_base(r, buf, MAX_BUF);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc rand%3d = 0x%16lx 0x%16lx\n", i, crc, crc_ref);
else
printf(".");
buf += MAX_BUF;
}
}
// Run tests at end of buffer
buf = (unsigned char *)buf_alloc; //reset buf
buf = buf + ((MAX_BUF - 1) * TEST_SIZE); //Line up TEST_SIZE from end
for (i = 0; i < TEST_SIZE; i++) {
crc = crc64_ecma_refl(TEST_SEED, buf + i, TEST_SIZE - i);
crc_ref = crc64_ecma_refl_base(TEST_SEED, buf + i, TEST_SIZE - i);
if (crc != crc_ref)
fail++;
if (verbose)
printf("crc eob rand%3d = 0x%16lx 0x%16lx\n", i, crc, crc_ref);
else
printf(".");
}
printf("Test done: %s\n", fail ? "Fail" : "Pass");
if (fail)
printf("\nFailed %d tests\n", fail);
return fail;
}

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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;
;;; uint64_t crc64_func(uint64_t init_crc, const unsigned char *buf, uint64_t len);
;;;
default rel
[bits 64]
%ifidn __OUTPUT_FORMAT__, elf64
%define WRT_OPT wrt ..plt
%else
%define WRT_OPT
%endif
%include "reg_sizes.asm"
extern crc64_ecma_refl_by8
extern crc64_ecma_refl_base
extern crc64_ecma_norm_by8
extern crc64_ecma_norm_base
section .data
;;; *_mbinit are initial values for *_dispatched; is updated on first call.
;;; Therefore, *_dispatch_init is only executed on first call.
crc64_ecma_refl_dispatched:
dq crc64_ecma_refl_mbinit
crc64_ecma_norm_dispatched:
dq crc64_ecma_norm_mbinit
section .text
;;;;
; crc64_ecma_refl multibinary function
;;;;
global crc64_ecma_refl:function
crc64_ecma_refl_mbinit:
call crc64_ecma_refl_dispatch_init
crc64_ecma_refl:
jmp qword [crc64_ecma_refl_dispatched]
crc64_ecma_refl_dispatch_init:
push rax
push rbx
push rcx
push rdx
push rsi
lea rsi, [crc64_ecma_refl_base WRT_OPT] ; Default
mov eax, 1
cpuid
lea rbx, [crc64_ecma_refl_by8 WRT_OPT]
test ecx, FLAG_CPUID1_ECX_SSE3
jz use_ecma_refl_base
test ecx, FLAG_CPUID1_ECX_CLMUL
cmovne rsi, rbx
use_ecma_refl_base:
mov [crc64_ecma_refl_dispatched], rsi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
ret
;;;;
; crc64_ecma_norm multibinary function
;;;;
global crc64_ecma_norm:function
crc64_ecma_norm_mbinit:
call crc64_ecma_norm_dispatch_init
crc64_ecma_norm:
jmp qword [crc64_ecma_norm_dispatched]
crc64_ecma_norm_dispatch_init:
push rax
push rbx
push rcx
push rdx
push rsi
lea rsi, [crc64_ecma_norm_base WRT_OPT] ; Default
mov eax, 1
cpuid
lea rbx, [crc64_ecma_norm_by8 WRT_OPT]
test ecx, FLAG_CPUID1_ECX_SSE3
jz use_ecma_norm_base
test ecx, FLAG_CPUID1_ECX_CLMUL
cmovne rsi, rbx
use_ecma_norm_base:
mov [crc64_ecma_norm_dispatched], rsi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
ret
;;; func core, ver, snum
slversion crc64_ecma_refl, 00, 00, 0018
slversion crc64_ecma_norm, 00, 00, 001e

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/**********************************************************************
Copyright(c) 2011-2016 Intel Corporation All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
* Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**********************************************************************/
/**
* @file crc64.h
* @brief CRC64 functions.
*/
#ifndef _CRC64_H_
#define _CRC64_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Multi-binary functions */
/**
* @brief Generate CRC from ECMA-182 standard in reflected format, runs
* appropriate version.
*
* This function determines what instruction sets are enabled and
* selects the appropriate version at runtime.
* @returns 64 bit CRC
*/
uint64_t crc64_ecma_refl(
uint64_t init_crc, //!< initial CRC value, 64 bits
const unsigned char *buf, //!< buffer to calculate CRC on
uint64_t len //!< buffer length in bytes (64-bit data)
);
/**
* @brief Generate CRC from ECMA-182 standard in normal format, runs
* appropriate version.
*
* This function determines what instruction sets are enabled and
* selects the appropriate version at runtime.
* @returns 64 bit CRC
*/
uint64_t crc64_ecma_norm(
uint64_t init_crc, //!< initial CRC value, 64 bits
const unsigned char *buf, //!< buffer to calculate CRC on
uint64_t len //!< buffer length in bytes (64-bit data)
);
/* Arch specific versions */
/**
* @brief Generate CRC from ECMA-182 standard in reflected format.
* @requires SSE3, CLMUL
*
* @returns 64 bit CRC
*/
uint64_t crc64_ecma_refl_by8(
uint64_t init_crc, //!< initial CRC value, 64 bits
const unsigned char *buf, //!< buffer to calculate CRC on
uint64_t len //!< buffer length in bytes (64-bit data)
);
/**
* @brief Generate CRC from ECMA-182 standard in normal format.
* @requires SSE3, CLMUL
*
* @returns 64 bit CRC
*/
uint64_t crc64_ecma_norm_by8(
uint64_t init_crc, //!< initial CRC value, 64 bits
const unsigned char *buf, //!< buffer to calculate CRC on
uint64_t len //!< buffer length in bytes (64-bit data)
);
/**
* @brief Generate CRC from ECMA-182 standard in reflected format, runs baseline version
* @returns 64 bit CRC
*/
uint64_t crc64_ecma_refl_base(
uint64_t seed, //!< initial CRC value, 64 bits
uint8_t *buf, //!< buffer to calculate CRC on
uint64_t len //!< buffer length in bytes (64-bit data)
);
/**
* @brief Generate CRC from ECMA-182 standard in normal format, runs baseline version
* @returns 64 bit CRC
*/
uint64_t crc64_ecma_norm_base(
uint64_t seed, //!< initial CRC value, 64 bits
uint8_t *buf, //!< buffer to calculate CRC on
uint64_t len //!< buffer length in bytes (64-bit data)
);
#ifdef __cplusplus
}
#endif
#endif // _CRC64_H_