fc1467deb2
Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
165 lines
4.5 KiB
NASM
165 lines
4.5 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; gf_vect_mul_avx(len, mul_array, src, dest)
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;;;
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%include "reg_sizes.asm"
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%ifidn __OUTPUT_FORMAT__, elf64
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%define arg0 rdi
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%define arg1 rsi
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%define arg2 rdx
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%define arg3 rcx
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%define arg4 r8
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%define arg5 r9
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%define tmp r11
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%define return rax
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%define func(x) x:
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%define FUNC_SAVE
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%define FUNC_RESTORE
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%elifidn __OUTPUT_FORMAT__, win64
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%define arg0 rcx
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%define arg1 rdx
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%define arg2 r8
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%define arg3 r9
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%define return rax
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%define stack_size 5*16 + 8 ; must be an odd multiple of 8
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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alloc_stack stack_size
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save_xmm128 xmm6, 0*16
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save_xmm128 xmm7, 1*16
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save_xmm128 xmm13, 2*16
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save_xmm128 xmm14, 3*16
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save_xmm128 xmm15, 4*16
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end_prolog
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%endmacro
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%macro FUNC_RESTORE 0
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vmovdqa xmm6, [rsp + 0*16]
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vmovdqa xmm7, [rsp + 1*16]
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vmovdqa xmm13, [rsp + 2*16]
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vmovdqa xmm14, [rsp + 3*16]
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vmovdqa xmm15, [rsp + 4*16]
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add rsp, stack_size
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%endmacro
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%endif
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%define len arg0
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%define mul_array arg1
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%define src arg2
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%define dest arg3
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%define pos return
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;;; Use Non-temporal load/stor
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%ifdef NO_NT_LDST
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%define XLDR vmovdqa
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%define XSTR vmovdqa
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%else
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%define XLDR vmovntdqa
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%define XSTR vmovntdq
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%endif
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default rel
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[bits 64]
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section .text
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%define xmask0f xmm15
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%define xgft_lo xmm14
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%define xgft_hi xmm13
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%define x0 xmm0
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%define xtmp1a xmm1
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%define xtmp1b xmm2
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%define xtmp1c xmm3
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%define x1 xmm4
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%define xtmp2a xmm5
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%define xtmp2b xmm6
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%define xtmp2c xmm7
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align 16
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global gf_vect_mul_avx:function
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func(gf_vect_mul_avx)
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FUNC_SAVE
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mov pos, 0
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vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
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vmovdqu xgft_lo, [mul_array] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
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vmovdqu xgft_hi, [mul_array+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
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loop32:
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XLDR x0, [src+pos] ;Get next source vector
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XLDR x1, [src+pos+16] ;Get next source vector + 16B ahead
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add pos, 32 ;Loop on 16 bytes at a time
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cmp pos, len
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vpand xtmp1a, x0, xmask0f ;Mask low src nibble in bits 4-0
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vpand xtmp2a, x1, xmask0f
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vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
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vpsraw x1, x1, 4
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vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
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vpand x1, x1, xmask0f
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vpshufb xtmp1b, xgft_hi, x0 ;Lookup mul table of high nibble
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vpshufb xtmp1c, xgft_lo, xtmp1a ;Lookup mul table of low nibble
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vpshufb xtmp2b, xgft_hi, x1 ;Lookup mul table of high nibble
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vpshufb xtmp2c, xgft_lo, xtmp2a ;Lookup mul table of low nibble
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vpxor xtmp1b, xtmp1b, xtmp1c ;GF add high and low partials
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vpxor xtmp2b, xtmp2b, xtmp2c
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XSTR [dest+pos-32], xtmp1b ;Store result
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XSTR [dest+pos-16], xtmp2b ;Store +16B result
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jl loop32
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return_pass:
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FUNC_RESTORE
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sub pos, len
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ret
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return_fail:
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FUNC_RESTORE
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mov return, 1
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ret
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endproc_frame
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section .data
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align 16
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mask0f:
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dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
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;;; func core, ver, snum
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slversion gf_vect_mul_avx, 01, 03, 0036
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