f3a99e81e9
CPUID and directly doing compiler checks in autoconf.ac
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#define EDX_MMX_BIT 23
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#define EDX_SSE_BIT 25
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#define EDX_SSE2_BIT 26
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#define ECX_SSE3_BIT 0
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#define ECX_SSSE3_BIT 9
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#define ECX_SSE41_BIT 19
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#define ECX_SSE42_BIT 20
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#define ECX_AVXOS_BIT 27
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#define ECX_AVX_BIT 28
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uint64_t get_supported_flags()
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{
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uint64_t supp_comp_flgs = 0;
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char *comp_flag = NULL;
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char SUPPORTED_COMP_FLAGS[] ="FLAGSFROMAUTOCONF\0";
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for (comp_flag = strtok(SUPPORTED_COMP_FLAGS, " "); comp_flag != NULL; comp_flag = strtok(NULL, " ")) {
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if (strncmp(comp_flag, "-m", 2) != 0) {
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fprintf(stderr, "Invalid comp_flag: %s\n", comp_flag);
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exit(2);
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}
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if (strcmp(comp_flag, "-mmmx\0") == 0) {
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supp_comp_flgs |= (1 << EDX_MMX_BIT);
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}
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if (strcmp(comp_flag, "-msse\0") == 0) {
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supp_comp_flgs |= (1 << EDX_SSE_BIT);
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}
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if (strcmp(comp_flag, "-msse2\0") == 0) {
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supp_comp_flgs |= (1 << EDX_SSE2_BIT);
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}
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if (strcmp(comp_flag, "-msse3\0") == 0) {
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supp_comp_flgs |= (1 << ECX_SSE3_BIT);
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}
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if (strcmp(comp_flag, "-mssse3\0") == 0) {
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supp_comp_flgs |= (1 << ECX_SSSE3_BIT);
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}
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if (strcmp(comp_flag, "-msse4.1\0") == 0) {
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supp_comp_flgs |= (1 << ECX_SSE41_BIT);
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}
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if (strcmp(comp_flag, "-msse4.2\0") == 0) {
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supp_comp_flgs |= (1 << ECX_SSE42_BIT);
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}
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if (strcmp(comp_flag, "-mavx\0") == 0) {
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supp_comp_flgs |= (1 << ECX_AVX_BIT);
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}
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}
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return supp_comp_flgs;
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}
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int is_supported(int cpuid_reg, uint64_t comp_flags, int feature_bit)
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{
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return ((cpuid_reg >> feature_bit) & 0x1) && ((comp_flags >> feature_bit) & 0x1);
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}
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int main(int argc, char** argv)
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{
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int feature_eax, feature_ebx, feature_ecx, feature_edx;
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uint64_t supp_comp_flgs = get_supported_flags(argc, argv);
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FILE *f = fopen("compiler_flags", "w");
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__asm__("cpuid"
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: "=a" (feature_eax), "=b" (feature_ebx), "=c" (feature_ecx), "=d" (feature_edx)
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: "a" (0x00000001));
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if (is_supported(feature_edx, supp_comp_flgs, EDX_MMX_BIT)) {
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fprintf(f, "-mmmx -DINTEL_MMX ");
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}
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if (is_supported(feature_edx, supp_comp_flgs, EDX_SSE_BIT)) {
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fprintf(f, "-msse -DINTEL_SSE ");
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}
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if (is_supported(feature_edx, supp_comp_flgs, EDX_SSE2_BIT)) {
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fprintf(f, "-msse2 -DINTEL_SSE2 ");
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}
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if (is_supported(feature_ecx, supp_comp_flgs, ECX_SSE3_BIT)) {
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fprintf(f, "-msse3 -DINTEL_SSE3 ");
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}
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if (is_supported(feature_ecx, supp_comp_flgs, ECX_SSSE3_BIT)) {
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fprintf(f, "-mssse3 -DINTEL_SSSE3 ");
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}
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if (is_supported(feature_ecx, supp_comp_flgs, ECX_SSE41_BIT)) {
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fprintf(f, "-msse4.1 -DINTEL_SSE41 ");
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}
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if (is_supported(feature_ecx, supp_comp_flgs, ECX_SSE42_BIT)) {
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fprintf(f, "-msse4.2 -DINTEL_SSE42 ");
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}
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if (is_supported(feature_ecx, supp_comp_flgs, ECX_AVX_BIT)) {
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if ((feature_ecx >> ECX_AVXOS_BIT) & 0x1) {
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fprintf(f, "-mavx -DINTEL_AVX ");
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}
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}
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fclose(f);
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return 0;
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}
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