92 lines
3.5 KiB
Python
92 lines
3.5 KiB
Python
# -*- coding: utf-8 -*-
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# Licensed under the Apache License, Version 2.0 (the "License"); you may
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# not use this file except in compliance with the License. You may obtain
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# a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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# Any user-specified feature/trait is prefixed with the custom namespace
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_CUSTOM_NS = 'CUSTOM_'
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# All hardware-specific features are prefixed with this namespace
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_HW_NS = 'HW_'
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# All CPU-specific features are prefixed with this namespace
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_CPU_NS = _HW_NS + 'CPU_'
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_CPU_X86_NS = _CPU_NS + 'X86_'
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# ref: https://en.wikipedia.org/wiki/Streaming_SIMD_Extensions
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HW_CPU_X86_AVX = _CPU_X86_NS + 'AVX'
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HW_CPU_X86_AVX2 = _CPU_X86_NS + 'AVX2'
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HW_CPU_X86_CLMUL = _CPU_X86_NS + 'CLMUL'
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HW_CPU_X86_FMA3 = _CPU_X86_NS + 'FMA3'
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HW_CPU_X86_FMA4 = _CPU_X86_NS + 'FMA4'
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HW_CPU_X86_F16C = _CPU_X86_NS + 'F16C'
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HW_CPU_X86_MMX = _CPU_X86_NS + 'MMX'
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HW_CPU_X86_SSE = _CPU_X86_NS + 'SSE'
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HW_CPU_X86_SSE2 = _CPU_X86_NS + 'SSE2'
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HW_CPU_X86_SSE3 = _CPU_X86_NS + 'SSE3'
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HW_CPU_X86_SSSE3 = _CPU_X86_NS + 'SSSE3'
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HW_CPU_X86_SSE41 = _CPU_X86_NS + 'SSE41'
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HW_CPU_X86_SSE42 = _CPU_X86_NS + 'SSE42'
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HW_CPU_X86_SSE4A = _CPU_X86_NS + 'SSE4A'
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HW_CPU_X86_XOP = _CPU_X86_NS + 'XOP'
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HW_CPU_X86_3DNOW = _CPU_X86_NS + '3DNOW'
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# ref: https://en.wikipedia.org/wiki/AVX-512
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HW_CPU_X86_AVX512F = _CPU_X86_NS + 'AVX512F' # foundation
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HW_CPU_X86_AVX512CD = _CPU_X86_NS + 'AVX512CD' # conflict detection
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HW_CPU_X86_AVX512PF = _CPU_X86_NS + 'AVX512PF' # prefetch
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HW_CPU_X86_AVX512ER = _CPU_X86_NS + 'AVX512ER' # exponential + reciprocal
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HW_CPU_X86_AVX512VL = _CPU_X86_NS + 'AVX512VL' # vector length extensions
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HW_CPU_X86_AVX512BW = _CPU_X86_NS + 'AVX512BW' # byte + word
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HW_CPU_X86_AVX512DQ = _CPU_X86_NS + 'AVX512DQ' # double word + quad word
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# ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets
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HW_CPU_X86_ABM = _CPU_X86_NS + 'ABM'
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HW_CPU_X86_BMI = _CPU_X86_NS + 'BMI'
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HW_CPU_X86_BMI2 = _CPU_X86_NS + 'BMI2'
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HW_CPU_X86_TBM = _CPU_X86_NS + 'TBM'
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# ref: https://en.wikipedia.org/wiki/AES_instruction_set
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HW_CPU_X86_AESNI = _CPU_X86_NS + 'AES-NI'
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# ref: https://en.wikipedia.org/wiki/Intel_SHA_extensions
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HW_CPU_X86_SHA = _CPU_X86_NS + 'SHA'
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# ref: https://en.wikipedia.org/wiki/Intel_MPX
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HW_CPU_X86_MPX = _CPU_X86_NS + 'MPX'
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# ref: https://en.wikipedia.org/wiki/Software_Guard_Extensions
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HW_CPU_X86_SGX = _CPU_X86_NS + 'SGX'
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# ref: https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions
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HW_CPU_X86_TSX = _CPU_X86_NS + 'TSX'
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# ref: https://en.wikipedia.org/wiki/Advanced_Synchronization_Facility
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HW_CPU_X86_ASF = _CPU_X86_NS + 'ASF'
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# ref: https://en.wikipedia.org/wiki/VT-x
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HW_CPU_X86_VMX = _CPU_X86_NS + 'VMX'
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# ref: https://en.wikipedia.org/wiki/AMD-V
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HW_CPU_X86_SVM = _CPU_X86_NS + 'SVM'
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# All storage-specific features are prefixed with this namespace
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_STORAGE_NS = 'STORAGE_'
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# All disk storage-specific features are prefixed with this namespace (as
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# opposed to object storage)
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_DISK_NS = _STORAGE_NS + 'DISK_'
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STORAGE_DISK_HDD = _DISK_NS + 'HDD' # spinning oxide
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STORAGE_DISK_SSD = _DISK_NS + 'SSD' # solid-state disks
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NAMESPACES = {
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'CUSTOM': _CUSTOM_NS,
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'HARDWARE': _HW_NS,
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'HW': _HW_NS,
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'CPU': _CPU_NS,
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'X86': _CPU_X86_NS,
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'STORAGE': _STORAGE_NS,
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'DISK': _DISK_NS,
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}
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