7d2a583f32
Adds the basics of the new os-capabilities library, including a README and a couple helper functions that allow the user to list both symbol names as well as the capability strings themselves. Added x86 CPU instruction set extensions as an initial set of namespaced standardized capability strings.
76 lines
3.0 KiB
Python
76 lines
3.0 KiB
Python
# -*- coding: utf-8 -*-
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# Licensed under the Apache License, Version 2.0 (the "License"); you may
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# not use this file except in compliance with the License. You may obtain
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# a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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# All hardware-specific features are prefixed with this namespace
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_HW_NS = 'hw:'
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# All CPU-specific features are prefixed with this namespace
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_CPU_NS = _HW_NS + 'cpu:'
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_CPU_X86_NS = _CPU_NS + 'x86:'
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# ref: https://en.wikipedia.org/wiki/Streaming_SIMD_Extensions
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HW_CPU_X86_AVX = _CPU_X86_NS + 'avx'
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HW_CPU_X86_AVX2 = _CPU_X86_NS + 'avx2'
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HW_CPU_X86_CLMUL = _CPU_X86_NS + 'clmul'
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HW_CPU_X86_FMA3 = _CPU_X86_NS + 'fma3'
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HW_CPU_X86_FMA4 = _CPU_X86_NS + 'fma4'
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HW_CPU_X86_F16C = _CPU_X86_NS + 'f16c'
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HW_CPU_X86_MMX = _CPU_X86_NS + 'mmx'
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HW_CPU_X86_SSE = _CPU_X86_NS + 'sse'
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HW_CPU_X86_SSE2 = _CPU_X86_NS + 'sse2'
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HW_CPU_X86_SSE3 = _CPU_X86_NS + 'sse3'
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HW_CPU_X86_SSSE3 = _CPU_X86_NS + 'ssse3'
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HW_CPU_X86_SSE41 = _CPU_X86_NS + 'sse41'
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HW_CPU_X86_SSE42 = _CPU_X86_NS + 'sse42'
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HW_CPU_X86_SSE4A = _CPU_X86_NS + 'sse4a'
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HW_CPU_X86_XOP = _CPU_X86_NS + 'xop'
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HW_CPU_X86_3DNOW = _CPU_X86_NS + '3dnow'
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# ref: https://en.wikipedia.org/wiki/AVX-512
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HW_CPU_X86_AVX512F = _CPU_X86_NS + 'avx512f' # foundation
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HW_CPU_X86_AVX512CD = _CPU_X86_NS + 'avx512cd' # conflict detection
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HW_CPU_X86_AVX512PF = _CPU_X86_NS + 'avx512pf' # prefetch
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HW_CPU_X86_AVX512ER = _CPU_X86_NS + 'avx512er' # exponential + reciprocal
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HW_CPU_X86_AVX512VL = _CPU_X86_NS + 'avx512vl' # vector length extensions
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HW_CPU_X86_AVX512BW = _CPU_X86_NS + 'avx512bw' # byte + word
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HW_CPU_X86_AVX512DQ = _CPU_X86_NS + 'avx512dq' # double word + quad word
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# ref: https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets
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HW_CPU_X86_ABM = _CPU_X86_NS + 'abm'
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HW_CPU_X86_BMI = _CPU_X86_NS + 'bmi'
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HW_CPU_X86_BMI2 = _CPU_X86_NS + 'bmi2'
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HW_CPU_X86_TBM = _CPU_X86_NS + 'tbm'
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# ref: https://en.wikipedia.org/wiki/AES_instruction_set
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HW_CPU_X86_AESNI = _CPU_X86_NS + 'aes-ni'
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# ref: https://en.wikipedia.org/wiki/Intel_SHA_extensions
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HW_CPU_X86_SHA = _CPU_X86_NS + 'sha'
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# ref: https://en.wikipedia.org/wiki/Intel_MPX
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HW_CPU_X86_MPX = _CPU_X86_NS + 'mpx'
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# ref: https://en.wikipedia.org/wiki/Software_Guard_Extensions
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HW_CPU_X86_SGX = _CPU_X86_NS + 'sgx'
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# ref: https://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions
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HW_CPU_X86_TSX = _CPU_X86_NS + 'tsx'
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# ref: https://en.wikipedia.org/wiki/Advanced_Synchronization_Facility
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HW_CPU_X86_ASF = _CPU_X86_NS + 'asf'
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# ref: https://en.wikipedia.org/wiki/VT-x
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HW_CPU_X86_VMX = _CPU_X86_NS + 'vmx'
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# ref: https://en.wikipedia.org/wiki/AMD-V
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HW_CPU_X86_SVM = _CPU_X86_NS + 'svm'
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NAMESPACES = {
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'hardware': _HW_NS,
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'hw': _HW_NS,
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'cpu': _CPU_NS,
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'x86': _CPU_X86_NS,
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}
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