Cole Walker 1f75e1a665 ptp4l: Fix stuck dataSet state in unicast BC
Adds patches 0081-0082 on top of the unicast client FSM series
(0070-0080) to fix state machine and BMC bugs specific to the
two-port inhibit_announce boundary clock topology used in StarlingX.

These patches complete the inhibit_announce support introduced in
0078-0079. The earlier patches fixed the unicast client FSM grant
negotiation and multi-master failover paths. This submission fixes
the BMC state decision logic and foreign master record handling that
interact with inhibit_announce to cause stuck or incorrect states.

Patch 0081 — bmc, clock: two-port unicast BC fixes

- Restructure bmc_state_decision() M1/M2/M3 paths so GRAND_MASTER
  and MASTER are only reachable for non-inhibit_announce ports.
  Prevents split-brain where both upstream and downstream ports
  claim GM simultaneously during holdover (clockClass 135 vs 248).

- Guard clock_update_grandmaster() in PS_GRAND_MASTER handler with
  if (!c->best) to prevent overwriting parentPortIdentity that
  clock_update_slave() set from the upstream master's announce.
  Fixes port stuck in UNCALIBRATED when inhibit_announce port is
  listed before the downstream port in config.

- Add unconditional clock_update_grandmaster() when best is NULL
  before the per-port loop, fixing stale gm.ClockClass in
  PARENT_DATA_SET after GRANDMASTER_SETTINGS_NP changes.

- Cache has_inhibit_port flag in clock_add_port() to replace O(n)
  LIST_FOREACH walk on every state decision event.

- Add [BMC], [GM_UPDATE], [UC_ORDER] debug instrumentation.

Patch 0082 — port, unicast_client: Fix stuck state in unicast BC

- Skip fc_prune() on inhibit_announce ports. These ports cannot
  re-announce, so pruned foreign master records cannot be rebuilt,
  causing a ~750ms BMCA fault loop after restart.

- In UNCALIBRATED announce receipt timeout, only call fc_clear()
  when p->best->n_messages == 0. Prevents clearing a live foreign
  master record while announces are still arriving.

- Set ANNOUNCE bit in ucma->granted on forced UC_WAIT -> UC_NEED_SYDY
  transition. Without it, sydymsk (0xa01) is never satisfiable and
  the FSM is permanently stuck even after SYNC and DELAY_RESP grants
  arrive.

- Add [BMCA] fc_clear debug logging on announce/sync timeout.

Test plan:

Pass: Build and deploy linuxptp_3.1.1-4.stx.16 to two-node BC chain
      (BC1 controller-0, BC2 controller-1) with dual upstream GMs.

Pass: GM1 stop/start: clean failover to holdover, clean
      recovery. gm.ClockClass tracks 6 -> 7 -> 6 correctly.

Pass: BC1 ptp4l stop/start: BC2 enters holdover, BC1
      re-locks to GM in <1s, full chain restored.

Pass: GM2 stop/start: no impact (backup)

Pass: clockClass degradation flows: class 6->7, 6->135,
      135->6, 6->165 transitions. BMCA tiebreak correct (lower
      clockID wins). No stale gm.ClockClass in PARENT_DATA_SET
      after GRANDMASTER_SETTINGS_NP changes.

Pass: GM failure during degraded state: clean failover to
      BC1 holdover

Pass: ptp-instance-apply: all instances restart and
      re-converge to GM in ~3s.

Pass: controller lock/unlock: BC2 retains holdover during
      lock, full chain restored after unlock.

Pass: Group H — controller-0 eno1 link down/up: port on eno1 goes
      FAULTY, recovers cleanly on link up. Full chain restored in
      ~3s.

Story: 2011536
Task: 53990

Change-Id: Iff70be62c4cc6be98dd64cc1e6b48aba5da0ba04
Signed-off-by: Cole Walker <cole.walker@windriver.com>
2026-03-23 11:12:41 -04:00
2026-02-27 10:20:36 +00:00
2023-08-29 16:52:04 -03:00
2026-01-05 17:16:21 +00:00
2019-01-08 11:42:04 -05:00
2026-02-05 15:07:16 -05:00
2023-09-06 17:54:55 -03:00
2021-09-09 19:05:36 +03:00
2018-05-31 07:36:35 -07:00
2025-03-10 09:13:52 -03:00

integ

StarlingX Integration

Description
StarlingX Integration and packaging
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