integ/base/linuxptp/debian/patches/0001-clock-Reset-state-when-switching-port-with-same-best.patch
Andre Mauricio Zelak b707fdb119 HA domain number
Support multiple domain numbers for each uds socket used in HA phc2sys.

The ha_domainNumber option is an interface setting to configure
the domain number for an uds socket. It ranges from 0 to 127.
If the ha_domainNumber is not configured for a given interface,
the global domainNumber setting is used.

Test plan:
PASS: Verify use of ha_domainNumber configuration in manual
configuration.

Failure path: domain number match
PASS: Verify that phc2sys fails to start if domain number
doesn't match ptp4l instance parameter.

Regression:
PASS: Verify use of global domain number in manual configuration.
PASS: Verify auto configuration uses global domain number.

Story: 2010723
Task: 48656

Change-Id: If71775f6ce02586573f005c3b3e805b5351a5a86
Signed-off-by: Andre Mauricio Zelak <andre.zelak@windriver.com>
2023-08-21 14:35:31 -03:00

35 lines
1.1 KiB
Diff

From 63b43924294da6cb177d0509120b2e957580441c Mon Sep 17 00:00:00 2001
From: Miroslav Lichvar <mlichvar@redhat.com>
Date: Mon, 31 May 2021 11:07:52 +0200
Subject: [PATCH 1/48] clock: Reset state when switching port with same best clock.
When the best port is changed, but the ID of the best clock doesn't
change (e.g. a passive port is activated on link failure), reset the
current delay and other master/link-specific state to avoid the switch
throwing the clock off.
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Miroslav Lichvar <mlichvar@redhat.com>
[commit 7e8eba5332671abfd95d06dd191059eded1d2cca upstream]
Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
---
clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clock.c b/clock.c
index a66d189..96453f4 100644
--- a/clock.c
+++ b/clock.c
@@ -1857,7 +1857,7 @@ static void handle_state_decision_event(struct clock *c)
cid2str(&best_id));
}
- if (!cid_eq(&best_id, &c->best_id)) {
+ if (!cid_eq(&best_id, &c->best_id) || best != c->best) {
clock_freq_est_reset(c);
tsproc_reset(c->tsproc, 1);
if (!tmv_is_zero(c->initial_delay))
--
2.25.1