Files
integ/base/linuxptp/debian/patches/0001-clock-Reset-state-when-switching-port-with-same-best.patch
Andre Mauricio Zelak cfe25f0193 Fixed event port id map
Fixed the port id map in the Port Data Set event handling. The port id
is composed by port number and node index after the HA implementation.

Code tidying. As definition, the port id and the port number are
different. An existing port number variable was rennamed to
prevent missinterpretation.

Code tidying. The HA node state change processing was disabled
when HA feature is not enabled.

Test plan:
PASS: Verify the phc2sys executable recognizes the port in the port
state change event, when -a configuration option is used
PASS: Verify the events in the HA scenario are being recognized

Story: 2010723
Task: 49405

Change-Id: Iea2b3c4e7d7dcd07ca2ad52bc4042f80282b1a9a
Signed-off-by: Andre Mauricio Zelak <andre.zelak@windriver.com>
2024-01-15 16:28:29 -03:00

36 lines
1.2 KiB
Diff

From 63b43924294da6cb177d0509120b2e957580441c Mon Sep 17 00:00:00 2001
From: Miroslav Lichvar <mlichvar@redhat.com>
Date: Mon, 31 May 2021 11:07:52 +0200
Subject: [PATCH 1/56] clock: Reset state when switching port with same best clock.
When the best port is changed, but the ID of the best clock doesn't
change (e.g. a passive port is activated on link failure), reset the
current delay and other master/link-specific state to avoid the switch
throwing the clock off.
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Miroslav Lichvar <mlichvar@redhat.com>
[commit 7e8eba5332671abfd95d06dd191059eded1d2cca upstream]
Signed-off-by: Jim Somerville <Jim.Somerville@windriver.com>
Signed-off-by: Andre Mauricio Zelak <andre.zelak@windriver.com>
---
clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clock.c b/clock.c
index a66d189..96453f4 100644
--- a/clock.c
+++ b/clock.c
@@ -1857,7 +1857,7 @@ static void handle_state_decision_event(struct clock *c)
cid2str(&best_id));
}
- if (!cid_eq(&best_id, &c->best_id)) {
+ if (!cid_eq(&best_id, &c->best_id) || best != c->best) {
clock_freq_est_reset(c);
tsproc_reset(c->tsproc, 1);
if (!tmv_is_zero(c->initial_delay))
--
2.25.1