Merge "spec: Marvell Octeon RAN Accelerator Integration"
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doc/source/specs/stx-9.0/approved/octeon_ep.rst
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doc/source/specs/stx-9.0/approved/octeon_ep.rst
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Copyright (c) 2022 Marvell International Ltd.
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==========================================
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Marvell Octeon RAN Accelerator Integration
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==========================================
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Storyboard:
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https://storyboard.openstack.org/#!/story/2010047
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Marvell supports Octeon line of SoCs to be used as a basic NIC or
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RAN Accelerator, when configured in Endpoint mode. Marvell developed PCI SR-IOV
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NIC drivers (PF and VF) for these products. The NIC drivers on host create a
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netdev interface for PF device and supports creating VFs. Octeon SoCs feature
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multiple ARM v9 cores along with Ethernet, PCIe and baseband PHY (RAN).
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This enables users to offload L1 processing to Octeon SoC.
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This specification describes what needs to be done to intergrate
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Marvell's PCIe NIC drivers (PF and VF) into StarlingX.
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Problem description
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===================
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Currently, StarlingX does not include support for Marvell RAN Accelerator card.
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This specification aims at integrating the Marvell PCIe NIC drivers into
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StarlingX platform to enable support for Marvell RAN accelerator cards.
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Use Cases
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---------
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To enable users to deploy Octeon as a basic NIC or RAN Accelerator on a
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StarlingX cloud installation.
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Proposed change
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===============
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This change adds following new drivers and tools:
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#. SRIOV PF and VF drivers. These drivers enable netdev communication between l2/l3 running on the host cpu and l1 running on the accelerator
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#. CNI plugin support for Marvell RAN Accelerator cards
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#. Integrate NIC firmware update tool
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Alternatives
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------------
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For PF and VF drivers, there are no alternatives for this as the device drivers
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are the only way of initializing and operating these devices.
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For CNI plugin, we will not be adding CNI plugin support from scratch.
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We will be leveraging the existing CNI plugin to enable suppoort for
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Marvell devices too.
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For NIC firmware update tool, the tool will be able to update firmware on
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Marvell RAN Accelerator from host through PCIe interface, without needing
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any drivers to be loaded. There is no alternate method for this.
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Data model impact
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-----------------
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No data model impact expected.
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REST API impact
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---------------
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This change will not add or change any REST APIs.
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Security impact
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---------------
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None
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Other end user impact
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---------------------
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User will be invoking the firmware update tool from host to update boot image,
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kernel or root filesystem on the Marvell RAN Accelerator card.
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Performance Impact
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------------------
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None; These drivers will only schedule work queue task to handle periodic
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heartbeat messages from Octeon card, and this is not CPU intensive.
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Other deployer impact
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---------------------
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None
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Developer impact
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----------------
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None
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Upgrade impact
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--------------
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None
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Implementation
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==============
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Assignee(s)
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-----------
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Primary assignee:
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Veerasenareddy Burru
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Other contributors:
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Abhijit Ayrekar
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Sathesh Edara
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Satananda Burla
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Repos Impacted
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--------------
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starlingx/config
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starlingx/fault
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starlingx/integ
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starlingx/kernel
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Work Items
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----------
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* Integrate the kernel SRIOV PF driver
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* Integrate the kernel SRIOV VF driver
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* Integrate NIC firmware update tool
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* Add CNI plugin support for Marvell RAN Accelerator NIC
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Dependencies
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============
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None
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Testing
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=======
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* Testing will be performed on Marvell RAN Accelerator hardware.
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* Testing will include basic PF NIC functionality, SRIOV VF creation,
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VF NIC functionality.
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* Unit tests will be provided on how to test the L1/L2 communication.
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Documentation Impact
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====================
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* End User guide need to be updated on how to run the marvell NIC firmware
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update tool.
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References
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==========
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The below product brief describes the family of Octeon CNF95XX in 5G RAN environment.
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https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-infrastructure-processors-octeon-fusion-cnf95xx-product-brief.pdf
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History
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=======
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.. list-table:: Revisions
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:header-rows: 1
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* - Release Name
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- Description
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* - 1
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- Introduced
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